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2
1
2
1
2
1
2
1
2
1
2
1
PC701
PC727
PC702
PC703
PC704
PC705
4.7U_0805_25V6-K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
@0.1U_0402_25V6
2200P_0402_50V7K
PC707
PR703
PC708
2
1
2
1 1
2
2
1
2
1
22.6K_0402_1%
0.22U_0603_25V7K
0.22U_0402_6.3V6K
5
6
7
8
2
1
29
8
9
10
11
12
13
14
VIN
2
1
RTN
VDD
ISUM
IMON
BOOT
AGND
ISUM+
5
3
2
1
2
1
2
1
3
2
1
1
2
2
1
DPRSLPVR
VR_ON
VID6
VID5
VID4
VID3
VID2
28
27
26
25
24
23
22
PR720
@10K_0402_1%
2
1
1
2
1
2
1
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5 4 3 2 1
Version change list (P.I.R. List) Power section Page 1 of 1
Item Reason for change PG# Modify List Phase
Date
1
D D
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C C
B B
A A
Security Classification Compal Secret Data
Compal Electronics, Inc.
2008/09/15 2009/09/15 Title
Issued Date Deciphered Date
Changed-List History
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS LA-4902P
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Wednesday, December 09, 2009 Sheet 44 of 44
5 4 3 2 1
http://laptop-motherboard-schematic.blogspot.com/
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2/2
No1. P21, LED0 and LED1 nets reversed No65. separate GND signals
No2. P16, for HP item 84, R294,R295,C274 value change
(1) P28 and P25, add GNDA and resistors,
No3. P20, due to JEDP1 42pin to 30 pin, redefining the signals,
please remember to change footprint, symbol, part number.
No4. P20, JEDP1 change footprint and value No66. P20, change JEDP1 to 24 pin connector, delete LANE[1:3] and EDID, as well as U4 relative signals.
No5. P14,15, delete PCH LVDS signals and USB_5 for LVDS_CAMERA No67. P31, change SPI ROM back to DB1 design, but mount 8pin, unmount 16pin
No6. P21, LED0 and LED1 change back. No68. P19, change misunderstand name:DPD_C_AUX/DPD_C_AUX# to DPD_C_AUX_L/DPD_C_AUX_L#
No7. P23, HDD/ODD footprint modified.
No8. P20, add 2 pins on JEDP1 by myself, different from database part 2/19
No9. P20, use real JEDP1 from database
No69. P5, delete MB_DP_DATA[1:3]_N/P for JEDP pin cutting
No10. P12, for HP item 69, delete SMB_DATA_S3, SMB_CLK_S3 and add 2 test points No70. C6 and C685 change to SE071100J80 because of Jason's request( vendor doesn't have the original 25V part)
No11. P14, for HP item 78, install R227 No71. P25, install C888,C889
No12. P29, for HP item 82, KB_RST# pull high to +3VS
No13. P4, for HP item 85, unistall R997 and del R40 2/20
No14. P4, for HP item 97, delete R34,R36,R37,R46,R49 and change name
No72. for HP item 66, P29, U66.5 should be connected to 3VL so that KBC can read board before boot and apply necessary fixes.
D of XDP_TDI & XDP_TDO, and short XDP_TDI_M to XDP_TDO_M D
No73. for HP item 103, P31, R1035 should be 0ohm
No15. P4, for HP item 98, add a series R between pin3 and 5 on U54 No74. P27, change SC_PWR circuits for unsurely current
No16. P21, for HP item 99, delete C484-C487, C945, R427, R428, R963, Q18
No17. P22, for HP item 100, delete Q80A 2/23
No18. P22, for HP item 101, Source and Drain of Q80B are swapped and change to a single 2N7002 No74. P26, uninstall U31 and add J1 for cost down
No75. change some test point footprint to TPC12: T61,T62,T1,T55,T97,T22, and P14 lots of points
No20. P12&P29, for HP item 103, change R948, R949, R952, R953,
R939, R176, R180, R940 to 0ohm and R950 to 33ohm
2/24
No21. P28, for HP item 104, Connect +5VS to JP32 pins 11, 178, 179. No76. P22, JP6 symbol error, modified!
No22. P11, for HP item 105, R141 is connected to +1.05VS No77. P12, add a net name XDP_FN4
No23. P24, for HP item 106, Del R1006 and and Q70A. Replace Q70B with a single 7002
No24. P28, for HP item 107, Delete R635-R638 and short the signals 2/25
No25. P12, for HP item 108, Delete C201, C203-C205 and short the signals No78. P32, change U44.8 to +5VALW for HP request
No26. P21, for HP item 110, LED0 and LED1 nets reversed again No79. P29, change R680=220 ohms
No27. P22, for HP item 111, Control signal for Q80B.GATE should be LAN_DIS#
No28. P7, for HP item 112, NO INSTALL R967 for ES1 silicon
No29. P12, for HP item 113, INSTALL R847 and change to 1Kohm. combine power schematics
Connect R847.1 to Q66.1 and remove the GND connection at R847.1.
No80. P25,
No30. P12, for HP item 80, install R184 and R190
(1) JP24: redefine the singals of the pins,
No31. P15 & P28, for HP item 79, GPIO38 and GPIO39 on U4 connect DOCK_ID0
(2) JP25: reverse pin definition
and DOCK_ID1 to the docking connector pins 77 and 78
No32. P15, for HP item 60, delete R283
No33. P29, for HP item 66, chenge KSO4 to KSO3, change 10K to 0 Ohm, change the Table, add a NOR gate
No34. for No 18, change Q80 Source and Drain pin back. No81.
(1)U4 change PN to SA00002KV30 for ES2
No35. P32, for HP item 115, change PM_SLP_LAN# to PM_SLP_M# at R386-1
(2)P31, &U1, &U2 change to SA000037A00
No36. P24, for HP item 116, circuits recuperation because of canceling item 106
No37. P19, for HP item 117, swap DPD_CTRLDATA and DPD_CTRLCLK,
AUX connects to CLK and AUX# connects to DATA,
3/6
add isolation nFET in series with Q74A and Q74B.
No38. P15, add 7 47P_0402 but  @ at every clock of PCI No82.
No39. P12, change RTCVCC source from +VREG3_51125 instead of +3VL
(1)P29, Firmwave said unmount R1021 and mount R1022
C C
(2)P4, delete R998 , otherwise BOM will be error
No40. ESD change: (1) @: D63~D67, D14, D57, D32, D68, D33, D34, D36, D62,
No41. ESD change: (2) change P/N: D14, D57, D32, D68, D33, D34, D36, D62, D37
No42. ESD change: (3) affact layout: D14, D33, D34, D36, D62, D37
No43. modify C962 GND disconnection and R70 to GND
No44. modify HF part number, please search"change HF P/N" to know which parts changed.
No45. for Load BOM problems, change some parts as below:
(1) add CONN@: JCPU1, JP5
(2) add P/N for dual 2N7002: Q2,Q3,Q7,Q8,Q81
(3) change P/N: R570, C6, C829, R43, R44, R47
No46. for DRC check,
(1) P23, delete dummy net of JODD1 pin16, 17
(2) P28, add intersheet symbol at SMB_CLK_S3 and SMB_DATA_S3
(3) P21, add a TP at U18.7: LAN_CTRL_18
(4) P14, delete a dummy net N19910781
(5) P28, change JP32 pin DCAD net name to DCAD1
No47. for parts forbidden:
(1) C829 change to SE026104KN0 (2) R800 change to SD028100380
(3) D68 change to SCA00000E00 (4) C818 change to 0402 SE070104Z80
No48. EMI concern:
(1) install C833, C836, C956
(2) P25, JP25 pin difinition changes.
(3) R931 to 47 ohm
(4) P18, modify CRT circuits: add L and C, change R places, install C
No49. P29, for HP item 123, Change R680 to 100 ohms, and uninstall R699
No50. P29, delete R886, R887 and relative circuits
No51. P28, delete R892 for BATCON
B B
No52. P23, change JODD1 pin16, 17 type to avoid from useless net names
No53. HF parts link database: D1
No54. HF parts link database:
(1) Q78 link SB00000H500
(2) D16, D63~D67 link SC2AN217020
(3) D1 link SC2N202U000
(4) D23~D29 did not link SC2P202U000, just revise manually
(5) Q57 & Q58 link SB000007H10
(6) C263 & C269 link SGA202211D0
(7) lots of 2N7002(Q4, Q23, Q32,Q41,Q42,Q43,Q45,Q46,48,49,50,51,
52,53,54,55,56,60,65,66,68,71,76,79,80) link SB000009080
(8) T63 link SP050002I10
(7) U42A, U42B, U44A, U57A link SA003930080
No55. combine power schematics 0212
No56. P29, for HP item 122, Connect D42-2 to VCORE_GP (not PM_PWROK)
TEST. change U42,U44,U57 value and footprint LM393DG_SO8
before netin
No57. change U42,U44,U57 link another SA003930080
2/16
No58. P5, for HP item 126, R60 and R61 should be NO INSTALL.
No59. P12, for HP item 127, Connect R857.1 to HDD_HALTLED_R instead of HDD_HALTLED
No60. P9,10, for HP item 128, Connect JDIMA1.199 and JDIMB1.199 to 3VS as Intel reference board
No61. P16, for HP item 131, Based on spec, VccTX_LVDS and VCCA_LVD to GND. [ Pobierz całość w formacie PDF ]